1. Field of the Invention
The present invention relates to semiconductor devices and methods of manufacturing the same, and, more particularly, to complementary metal-oxide semiconductor (CMOS) devices and methods of manufacturing the same.
2. Description of the Related Art
Typically, a gate of metal-oxide semiconductor field effect transistors (MOSFETs) comprises polysilicon. However, because the design rule of complementary metal-oxide semiconductor (CMOS) devices is typically less than 100 nm, the use of a polysilicon gate may result in gate depletion and boron (Br) penetration. Recently, high-k materials have been used to form gate-insulating layers. However, most high-k materials and polysilicon typically cannot be used together. To solve this problem, a metal gate may be used in sub-100 nm CMOS devices.
In a CMOS device including an n-channel metal-oxide semiconductor (NMOS) transistor and a p-channel metal-oxide semiconductor (PMOS) transistor, the NMOS and PMOS transistors may have a symmetric threshold voltage. When a CMOS device is designed for high performance, the NMOS transistor and the PMOS transistor included therein may have a threshold voltage as low as ±0.2 V. To manufacture such a CMOS device with a symmetric threshold voltage, much research has been conducted.
The threshold voltage of the NMOS transistor and the PMOS transistor can be controlled by changing the concentration of a dopant for channels of the NMOS and PMOS transistors. The doping concentration of the channels can be adjusted using an ion implantation process. However, ion implantation may be used only for a planar transistor including a bulk substrate. That is, ion implantation typically cannot be used for 3-dimensional transistors, such as a transistor with a thin body channel. A transistor with a thin body channel may be referred to as a transistor with a thin channel region. Examples of transistors with thin channel regions include double gate (DG) electric field effect transistors, FinFETs, GAA electric field effect transistors, multi bridge channel electric field effect transistors (see U.S. Publication No. 2004/0063286 A1) and the like. The channel region of a transistor with a thin channel is separated from a bulk substrate, and is formed as a thin layer. Therefore, changing the doping concentration of the channel region by using an ion implantation process typically cannot be used to control the threshold voltage of the NMOS transistor and the PMOS transistor.
When a metal gate is used, to obtain a symmetric threshold voltage in the NMOS and PMOS transistors, the work function of the metal gate of the NMOS transistor may be similar to the work function of an n+ polysilicon gate and the work function of the metal gate of the PMOS transistor to a p+ polysilicon gate. For example, a dual metal gate can be used to make the work function of the metal gate similar to that of a polysilicon gate. For example, a CMOS device including a dual metal gate is disclosed in “Dual-Metal Gate CMOS Technology with Ultrathin silicon Nitride Gate Dielectric”, IEEE electron Device Letters, Vol. 22, No. 5, May 2001, pp. 227-229 by Yee-chia Yeo et al., in which an NMOS transistor has a gate electrode comprising Ti and a PMOS transistor has a gate electrode comprising Mo. However, the use of different materials to form gates makes the manufacturing process more complex.
A possible solution is forming the gates of the NMOS transistor and the PMOS transistor using identical materials with different work functions. For example, a CMOS device including a gate comprising Mo is disclosed in “Metal Gate Work Function Adjustment for Future CMOS Technology”, 2001 symposium on VLSI Technology digest of Technical Papers, pp. 45-46 by Qiang Lu, et. al. In this case, a gate of a PMOS transistor comprises (110)-Mo, and a gate of an NMOS transistor comprises (110)-Mo in which nitrogen ions are implanted. When nitrogen ions are implanted into (110)-Mo, the work function of the metal decreases. Therefore, a CMOS device with a symmetric threshold voltage can be manufactured using a single metal.
In addition, a CMOS device including a gate comprising TiNx is disclosed in “A Dual-Metal Gate CMOS Technology Using Nitrogen-Concentration-Controlled TiNx Film”, IEEE Transactions on Electron Devices, Vol. 48, No. 10, October 2001, pp. 2363-2369 by Hitoshi Wakabayashi, et. al. In this case, threshold voltages of an NMOS transistor and a PMOS transistor are controlled using a low-power nitrogen ion implantation process by changing a nitrogen concentration of a TiNx gate electrode. In addition, because the nitrogen concentration of the TiNx gate electrode can be controlled, a CMOS device can be manufactured using a conventional NMOS transistor manufacturing technique.
However, the CMOS devices and methods of manufacturing the same discussed in the above-mentioned references typically cannot be used for 3-dimensional transistors with a thin body channel. For example, a multi-bridge channel field effect transistor (MBCFET) typically includes a gate electrode surrounding a channel, and a DG FET typically includes a gate electrode formed on a bottom surface of a channel as well as a gate electrode formed on a top surface of a channel. Therefore, whether the gate electrode comprises (110)-Mo or TiNx, a work function of the gate electrode, that is, a threshold voltage of the transistor, generally cannot be controlled by the nitrogen ion implanting process. This problem may also occur when a thin channel transistor with other types is used.
Further, it is generally difficult to form the gate of the thin channel transistor using the above-mentioned metal materials. That is, currently, Ta-nitride, Mo, Hf, Titanium-nitride, or the like is introduced as a metal gate material and, in particular, refractory metal materials typically cannot be patterned to have a desired profile by using dry etching and chemical mechanical polishing (CMP). Thus, metal gate materials, which are suitable for the known structures and manufacturing methods of conventional CMOS devices, may be limited.